Design and implementation of a high speed microprocessor simulator BurstScalar

AbstractThis paper describes the design and implementation ofour high speed simulator for out-of-order microprocessorsnamed BurstScalar. The simulator is based on the well-known SimpleScalar simulator but its execution speed is ac-celerated by computation reuse technique. Each time a loopis iterated, BurstScalar consults its state transition table toexamine whe..